So the egress of digital processing system lies in the parallel architecture 因而其信號處理機(jī)的出路在于體系結(jié)構(gòu)的并行化。
So the egress of digital processing systern lies in the parallel architecture 因而其信號處理機(jī)的出路在于體系結(jié)構(gòu)的并行化。
At last , it describes the scalable parallel architecture of advanced wp system based on multiple sharcs 最后分析了基于多sharc的vvp可擴(kuò)展并行處理系統(tǒng)的組成方式和結(jié)構(gòu)特點(diǎn)。
The thesis analyses the key technology of computer parallel architecture by constructing a system for dual - computer system parallel processing 本文通過構(gòu)建一個并行處理雙機(jī)系統(tǒng)分析了計算機(jī)并行系統(tǒng)的關(guān)鍵技術(shù)。
Theebe - cg algorithm does not require construction of the global matrix . it can be implemented efficiently on a massively parallel architecture Ebe - cg算法不需要構(gòu)造全局矩陣,它在大規(guī)模并行結(jié)構(gòu)中能被有效地實(shí)現(xiàn)。